Ph.D., Computer Engineering with minor in Computer Science

GPA: 3.9/4.0

Expected graduation date: December 1999

1991–1995, Sharif University of Technology, Tehran

B.S., Electrical Engineering

GPA: 3.7/4.0

• A. H. Salek, J. Lou, M. Pedram, "An integrated logical and physical design flow for deep submicron circuits," accepted for publication in IEEE Transactions on Computer-Aided Design

• A. H. Salek, J. Lou, and M. Pedram, "Semi-order-independent hierarchical buffered routing generation using local neighborhood search," to appear in the proceedings of Design Automation Conference, New Orleans, Louisiana, June 1999

• A. H. Salek, J. Lou, and M. Pedram, "A simultaneous routing tree construction and fanout optimization algorithm," in the proceedings of International Conference on Computer-Aided Design, pages 625-630, San Jose, California, November 1998

• A. H. Salek, J. Lou, and M. Pedram, "A DSM design flow: Putting floorplanning, technology-mapping, and gate placement together," in the proceedings of Design Automation Conference, pages 128-133, San Francisco, California, June 1998

• C. Ashton, R. Lee, K. Mednick, and A. H. Salek, "Optimization of Vampire for specific design types," Cadence Technical Conference, May 1998

• J. Lou, A. H. Salek, and M. Pedram, "An integrated flow for technology remapping and placement of sub-half micron circuits," In the proceedings of the Asia and South-Pacific Design Automation Conference, pages 295-300, Yokohama, Japan, February 1998

• A. M. Zarkesh, A. H. Salek, M. R. Kolahdouzan, M. R. Danesh, and J. Adibi, "On localized inter-agent communication in a collaborative agent-based floor-planning environment," In the proceedings of CRIP Conference, Los Angeles, California, October 1997

• J. Lou, A. H. Salek, and M. Pedram, "An exact solution to simultaneous technology mapping and linear placement problem", In the proceedings of International Conference on Computer-Aided Design, pages 671-675, San Jose, California, November 1997

• J. Lou, A. H. Salek, and M. Pedram, "An exact solution to simultaneous technology mapping and linear placement problem for trees", International Workshop on Logic Synthesis, session 4, paper 4, Lake Tahoe, Califonia, May 1997

• 1998, University of Southern California, Los Angelels

Winner of the Computer Engineering Student Seminar Series best presentation award

• 1997, University of Southern California, Los Angelels

Ranked #1 in the Computer Engineering Ph.D. program entrance competition

• 1995, University of Science and Technology, Tehran

Ranked among the top 1% participants in the nationwide Electrical Engineering M.S. program entrance competition

• 1991, International Physics Olympiad

A participant in the 22^nd International Physics Olympiad – Only 140 top senior high school students from more than 35 countries were granted the opportunity to participate in that worldwide competition

• 1991, Alborz High School, Tehran

Ranked among the top 5% participants in the nationwide Mathematics Olympiad competition

Research Assistant

Member of Advanced Design Automation Lab

Published 9 technical papers in recognized conferences and journals

Worked on different research projects including interaction of synthesis and layout, floorplanning, simulation, and design rule checking

1998–Summer, Magma Design Automation, Inc., Cupertino

Summer Intern

Designed and implemented a macro-cell placement tool targeting high performance and low congestion layouts

1997–Summer, Cadence Design Systems, Inc., San Jose

Summer Intern

Designed and implemented an automatic runtime profiler tool for Vampire (a widely used layout design rule checker from Cadence)

Designed and implemented a novel hierarchy extraction tool that significantly speeds up Vampire for large ASIC’s

1996–Summer, Cadence Design Systems, Inc., San Jose

Summer Intern

Analyzed state-of-the-art logic synthesis techniques and devised a new logic synthesis algorithm for combinational circuits

1995–1996, University of Southern California, Los Angeles

Teaching Assistant

Assisted in teaching the Logic Circuit Design course to more than 120 students

1994–1995, Sharif University of Technology, Tehran

Research Assistant

Designed and analyzed a novel wireless indoor LAN system using an optical code division multiple access technique