I received my Ph.D. from the Electrical Engineering Dept. at University of Southern California. I am currently a Senior Engineer at Qualcomm Inc. During my Ph.D. studies, I worked in System Power Optimization and Regulation Technologies (SPORT) Lab under supervision of Prof. Massoud Pedram. I received my B.Sc. from Sharif University of Technology, in 2001 and the M.Sc. degree from University of Tehran in 2003, both in Electrical and Electronics Engineering.

During the summer of 2005, I worked at Fujitsu Laboratories of America on low-power SRAM design in deep-submicron technologies. In summer 2006, I worked at Magma Design Automation Inc. on run-time and OPC-aware leakage optimization techniques. My research interests include different topics in VLSI design and CAD, especially:

Low power design optimization: CAD tool development and circuit design

Leakage reduction techniques for semiconductor memories

Power delivery network design

Timing analysis and signal integrity