References

GaDu92

D. Gajski, N. Dutt, A. Wu, and Y.-L. Lin, ``High-Level Synthesis, Introduction to Chip and System Design'', Kluwer Academic Publisher, 1992.

Stok91

L. Stok, ``Architectural Synthesis and Optimization of Digital Systems'', Ph.D Dissertation, Eindhoven University of Technology, 1991.

DeMi94

G. De Micheli, ``Synthesis and Optimization of Digital Circuits'', McGraw Hill 1994.

RaJh94

A. Raghunathan and N. Jha, ``Behavioral Synthesis for Low Power'', In Proc. Int'l Conf. on Computer Design 1994.

ChPe95a

J.-M. Chang and M. Pedram, ``Low Power Register Allocation and Binding,'' in Proceedings of the 32nd DAC, June 1995.

GoOr94

L. Goodby, A. Orailoglu and P.M. Chau,``A High-Level Synthesis Methodology for Low Power VLSI Design''. In Proc. of the IEEE Symposium on Low Power Electronics, 1994.

ChPo92

A. Chandrakasan, M. Potkonjak, J. Rabaey, and R.W. Brodersen,``HYPER-LP: A System for Power Minimization Using Architectural Transformations'', In Proc. of the Int'l Con. on Computer Aided Design 1992.

ChPe96a

J.-M. Chang and M. Pedram, ``Module Assignment for Low Power'', In Proc. of the European Design Automation Conference, Sep., 1996.

ChPe96b

J.-M. Chang and M. Pedram. ``Energy Minimization Using Multiple Supply Voltages'', In Proceedings International Symposium for Low Power Electronic and Design, August 1996.

RaSa95

S. Raje, M. Sarrafzadeh, ``Variable Voltage Scheduling,'' in Proceedings of the 1995 International Workshop Low Power Design, 1995

UsHo95

K. Usami and M. Horowitz, ``Clustered Voltage Scaling Technique for Low-Power Design,'' in Proceedings of the 1995 International Workshop on Low Power Design, pp. 3-8, 1995