Publications for Massoud PEDRAM

[Books |Book Chapters | Journal Publications |Journal Submissions |Conference Publications]

Books

  1. M. Pedram (editor), ACM-SIGDA Multimedia Monograph Series, Volumes 1-12, ACM Publications.

  2. M. Pedram and J. Rabaey (editors), Power Aware Design Methodologies,  Kluwer Academic Publishers, Boston, 2002.

  3. J. Chang and M. Pedram, Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods,  Kluwer Academic Publishers, Boston, 1999.

  4. S. Iman and M. Pedram, Logic Synthesis for Low Power VLSI Designs,  Kluwer Academic Publishers, Boston, 1997.

  5. J. Rabaey and M. Pedram (editors), Low Power Design Methodologies,  Kluwer Academic Publishers, Boston, 1995.

Book Chapters

  1. A. Iranli and M. Pedram, "System-level power management: An overview," In The VLSI Handbook, Edited by W-K. Chen, Taylor and Francis, 2006.

  2. A. Abdollahi and M. Pedram, "Power minimization techniques at the RT-level and below," In SoC: Next Generation Electronics, Edited by Bashir M. Al-Hashimi, IEE Press, 2005.

  3. M. Maleki and M. Pedram, "Power-aware on-demand routing protocols for mobile ad hoc networks,"  In Low Power Electronics Design, Edited by C. Piguet. The CRC Press, 2004.

  4. W-C. Cheng and M. Pedram, "Transmittance scaling for reducing power dissipation of a backlit TFT-LCD,"  In Ultra Low Power Design, Edited by E. Macii. Kluwer Academic Publishers, 2004.

  5. M. Pedram, "Power simulation and estimation in VLSI circuits,"  In The VLSI Handbook, Edited by W-K. Chen. The CRC Press and the IEEE Press, 1999.

  6. M. Pedram, "Advanced power estimation techniques,"  In Low Power Design in Deep Submicron Technology, Edited by J. Mermet and W. Nebel. Kluwer Academic Publishers, 1997.

  7. S. Iman and M. Pedram, "Combinational circuit optimization,"  In Low Power Design in Deep Submicron Technology, Edited by J. Mermet and W. Nebel. Kluwer Academic Publishers, 1997.

  8. M. Pedram, "Design technologies for low power VLSI,"  In Encyclopedia of Computer Science and Technology, Vo. 36, Marcel Dekker, Inc., 1997, pp. 73-96.

  9. S. B. K. Vrudhula, M. Pedram and Y. T. Lai, "Edge-valued binary-decision diagrams,"  In Representations of discrete functions, Edited by T. Sasao and M. Fujita. Kluwer Academic Publishers, 1996, pp. 109-132.

Journal Publications

  1. S. Nazarian and M. Pedram, "Analysis of crosstalk-affected propagation delay of VLSI interconnect in nanometer technologies," to appear in Int'l Journal of Electronics, 2008.

  2. E. Pakbaznia, F. Fallah, and M. Pedram, "Charge recycling in power-gated CMOS circuits," to appear in IEEE Trans. on Computer Aided Design, 2008.

  3. H-S. Jung, A. Hwang, and M. Pedram, "Predictive-flow-queue based energy optimization for gigabit Ethernet controllers." to appear in IEEE Trans. on VLSI Systems, 2008.

  4. H-S. Jung and M. Pedram, "Uncertainty-aware dynamic power management in partially observable domains," to appear in IEEE Trans. on VLSI Systems, 2008.

  5. M. Mottaghi-Dastjerdi, A. Afzali-Kusha, and M. Pedram,"BZ-FAD: A low-power low-area multiplier based on shift-and-add architecture," to appear in IEEE Trans. on VLSI Systems, 2008.

  6. B. Amelifard, F. Fallah and M. Pedram, "Leakage minimization of SRAM cells in a dual-Vt and dual-Tox technology," to appear in IEEE Trans. on VLSI Systems, 2008.

  7. W-B. Lee, K. Patel, and M. Pedram, "GOP-level dynamic thermal management in MPEG-2 decoding," IEEE Trans. on VLSI Systems, Vol. 16, No.6, Jun. 2008, pp. 662-672.

  8. A. Abdollahi and M. Pedram, "Symmetry detection and Boolean matching utilizing a signature-based canonical form of Boolean functions," IEEE Trans. on Computer Aided Design, Vol. 27, No.6, Jun. 2008, pp. 1128-1137.

  9. P. Rong and M. Pedram, "Energy-aware task scheduling and dynamic voltage scaling in a real-time system," Int'l Journal of Low Power Electronics, American Scientific Publishers, Vol. 4, No. 1, Apr. 2008, pp. 1-10.

  10. A. Abbasian, S. Hatami, A. Afzali-Kusha, and M. Pedram, "Wavelet-based dynamic power management for non-stationary service requests," ACM Trans. on Design Automation of Electronic Systems, Vol. 13, No. 1, 2008, pp. 13:1-13:41.

  11. H. Parandeh-Afshar, M. Saneei, A. Afzali-Kusha, and M. Pedram, "Fast INC-XOR codec for low power address buses," IET Computers & Digital Techniques, Vol. 1, No. 5, Sep. 2007, 625-626.

  12. C-W. Kang, A. Iranli, and M. Pedram, "A synthesis approach for coarse-grained, antifuse-based FPGAs." IEEE Trans. on Computer Aided Design, Vol. 26, No. 9, Sep. 2007, pp. 1564-1575.

  13. S. Abbaspour, H. Fatemi, and M. Pedram, "Parameterized block-based non-Gaussian variational gate timing analysis," IEEE Trans. on Computer Aided Design, Vol. 26, No. 8, Aug. 2007, pp. 1495-1508.

  14. A. Abdollahi, F. Fallah, and M. Pedram, "A robust power gating structure and power mode transition strategy for MTCMOS design," IEEE Trans. on VLSI Systems, Vol. 15, No., 1, Jan. 2007, pp. 80-89.

  15. D. Hammerstrom, J. Harlow, I. Bahar, W. H. Joyner, C. Lau, D. Marculescu, A. Orailoglu, M. Pedram, "Architectures for Silicon nanoelectronics and beyond," IEEE Computer Magazine, Jan. 2007, pp. 62-70.

  16. S. Abbaspour, M. Pedram, and A.H. Ajami, "Fast interconnect and gate timing analysis for performance optimization." IEEE Trans. on VLSI Systems, Vol. 14, No. 12, Dec. 2006, pp. 1383-1388.

  17. A. Iranli and M. Pedram, "Cycle-based decomposition of Markov chains with applications to low power synthesis and sequence compaction for finite state machines."  IEEE Trans. on Computer Aided Design, Vol. 25, No. 12, Dec. 2006, pp. 2712-2725.

  18. A. Iranli, W-B. Lee, and M. Pedram, "HVS-Aware Dynamic Backlight Scaling in TFT LCD's."  IEEE Trans. on VLSI systems, Vol. 14, No. 10, Oct. 2006, pp. 1103-1116.

  19. M. Pedram and S. Nazarian, "Thermal modeling, analysis and management in VLSI circuits: principles and methods."  Proc. of IEEE, Special Issue on Thermal Analysis of ULSI, Vol. 94, No. 8, Aug. 2006, pp. 1487-1501.

  20. P. Rong and M. Pedram, "Battery-aware power management based on Markovian decision processes."  IEEE Trans. on Computer Aided Design, Vol. 25, No. 7, Jul. 2006, pp. 1337-1349.

  21. P. Rong and M. Pedram, "An analytical model for predicting the remaining battery capacity of Lithium-ion batteries."  IEEE Trans. on VLSI systems, Vol. 14, No. 5, May 2006, pp. 441-451.

  22. P. Heydari and M. Pedram, "Model-order reduction using variational balanced truncation with spectral shaping."  IEEE Trans. on Circuits and Systems I, Vol. 53, No. 4, Apr. 2006, pp. 879-891. (Best Paper Award)

  23. C-W. Kang and M. Pedram, "A leakage-aware low power technology mapping algorithm considering the hot-carrier effect."  Int'l Journal of Low Power Electronics, American Scientific Publishers, Vol. 1, No. 2, pp. 133-144, Aug. 2005.

  24. M. Pedram and A. Abdollahi, "Low power RT-level synthesis techniques: a tutorial."  IEE Proc. on Computers and Digital Techniques, Vol. 152, No. 3, pp. 333-343, May 2005.

  25. A. H. Ajami, K. Banerjee, and M. Pedram, "Modeling and analysis of non-uniform substrate temperature effects in high performance VLSI."  IEEE Trans. on Computer Aided Design, Vol. 24, No. 6, Jun. 2005, pp. 849-861.

  26. F. Fallah and M. Pedram, "Standby and active leakage current control and minimization in CMOS VLSI circuits."  IEICE Trans. on Electronics, Special Section on Low-Power LSI and Low-Power IP, Vol. E88-C, No. 4 Apr. 2005, pp. 509-519.

  27. K. Choi, W-C. Cheng, and M. Pedram "Frame-based dynamic voltage and frequency scaling for an MPEG player."  Journal of Low Power Electronics, American Scientific Publishers, Vol. 1, No. 1, Apr. 2005, pp. 27-43.

  28. K. Choi, K. Kim, and M. Pedram "Energy-aware MPEG-4 FGS streaming."  Journal of Low Power Electronics, American Scientific Publishers, Vol. 1, No. 1, Apr. 2005, pp. 44-51.

  29. A. Ajami, K. Banerjee, and M. Pedram, "Scaling analysis of on-chip power grid voltage variations in nanometer scale ULSI."  Journal of Analog Integrated Circuits and Signal Processing, Vol. 42, No. 3, Mar. 2005, pp. 277-290.

  30. P. Heydari and M. Pedram, "Capacitive crosstalk noise in high speed VLSI circuits."  IEEE Trans. on Computer Aided Design, Vol. 24, No. 3, Mar. 2005, pp.478-488.

  31. K. Choi, R. Soma, and M. Pedram, "Fine-grained dynamic voltage and frequency scaling for precise energy and performance trade-off based on the ratio of off-chip access to on-chip computation times."  IEEE Trans. on Computer Aided Design, Vol. 24, No. 1, Jan. 2005, pp.18-28.

  32. H. Shim, N. Chang, and M. Pedram, "A backlight power management framework for the battery-operated multi-media systems."  IEEE Design and Test Magazine, Sep./Oct. 2004, pp. 388-396.

  33. P. Heydari, S. Abbaspour and M. Pedram, "Interconnect energy dissipation in high-speed ULSI circuits."  IEEE Trans. on Circuits and Systems I, Vol. 51, No. 8, Aug. 2004, pp. 1501-1514.

  34. Y. Aghaghiri, F. Fallah, and M. Pedram, "Transition reduction in memory buses using sector-based encoding techniques."  IEEE Trans. on Computer Aided Design, Vol. 23, No. 8, Aug. 2004, pp. 1164-1174.

  35. W-C. Cheng and M. Pedram, "Chromatic encoding: a low power encoding technique for Digital Visual Interface."  IEEE Trans. on Consumer Electronics, Vol. 50, No. 1, Feb. 2004, pp. 320-328.

  36. W-C. Cheng and M. Pedram, "Power minimization in a backlit TFT-LCD display by concurrent brightness and contrast scaling."  IEEE Trans. on Consumer Electronics, Vol. 50, No. 1, Feb. 2004, pp. 25-32.

  37. A. Abdollahi, F. Fallah, and M. Pedram, "Leakage current reduction in CMOS VLSI circuits by input vector control."  IEEE Trans. on VLSI Systems, Vol. 12, No. 2, Feb. 2004, pp.140-154.

  38. P. Rezvani and M. Pedram. "A fanout optimization algorithm based on the effort delay model."  IEEE Trans. on Computer Aided Design, Vol. 22, No. 12, Dec. 2003, pp. 1671-1677.

  39. P. Heydari and M. Pedram. "Ground bounce in digital VLSI circuits,"  IEEE Trans. on VLSI Systems, Vol. 11, No. 2, Apr. 2003, pp. 180-193.

  40. M. Pedram and Q. Wu. "Design considerations for battery-powered electronics,"  IEEE Trans. on VLSI Systems, Vol. 10, No. 5, Oct. 2002, pp. 601-607.

  41. Y. Aghaghiri, F. Fallah and M. Pedram. "A class of irredundant encoding techniques for reducing bus power,"  Special Issue on Low Power Design in Journal of Circuits, Systems, and Computers, World Scientific Publishers, Vol. 11, No. 5 (2002) pp. 445-457.

  42. W-C. Cheng and M. Pedram. "Power-aware bus encoding techniques for I/O and data busses in an embedded system,"  Special Issue on Power IC Design in Journal of Circuits, Systems, and Computers, World Scientific Publishers, Vol. 11, No. 4 (2002), pp. 351-363.

  43. X. Wu, G. Hang and M. Pedram. "Low power DCVSL circuits employing AC power supply,"  Science in China, Vol. 45, No. 3 (2002), pp. 232-242.

  44. W-C. Cheng and M. Pedram. "Power-optimal encoding for a DRAM address bus,"  IEEE Trans. on VLSI Systems, Vol. 10, No. 2, Apr. 2002, pp. 109-118.

  45. A. Salek, J. Lou and M. Pedram. "Hierarchical buffered routing tree generation,"  IEEE Trans. on Computer Aided Design, Vol. 21, No. 5, May 2002, pp. 554-567.

  46. C-T. Hsieh and M. Pedram. "Architectural power optimization by bus splitting,"  IEEE Trans. on Computer Aided Design, Vol. 21, No. 4, Apr. 2002, pp. 408-414.

  47. X. Wu, B. Chen and M. Pedram. "Power estimation in CMOS circuits based on multiple-valued logic,"  Journal of Multiple Valued Logic, Gordon and Breach Publishing Group, Vol.7, No. 3-4 (2001), pp. 195-211.

  48. Q. Qiu, Q. Wu and M. Pedram. "Stochastic modeling of a power-managed system: construction and optimization,"  IEEE Trans. on Computer Aided Design, Vol. 20, No. 10, Oct. 2001, pp. 1200-1217.

  49. Q. Wu, Q. Qiu and M. Pedram. "Estimation of peak power dissipation in VLSI circuits using the limiting distributions of extreme order statistics,"  IEEE Trans. on Computer Aided Design, Vol. 20, No. 8, Aug. 2001, pp. 942-956.

  50. X. Wu and M. Pedram, "Low-power sequential circuit design using T flip-flops,"  Int'l Journal of Electronics, Taylor and Francis Publishing Group, Vol. 88, No.6, Jun. 2001, pp. 635-643.

  51. J. Oh and M. Pedram, "Gated clock routing for low power microprocessor design,"  IEEE Trans. on Computer Aided Design, Vol. 20, No. 6, Jun. 2001, pp. 715-722.

  52. H. Vaishnav and M. pedram. "Alphabetic trees: theory and applications in layout-driven logic synthesis,"  IEEE Trans. on Computer Aided Design, Vol. 20, No. 1, Jan. 2001, pp. 58-69.

  53. C-S. Ding, C-T. Hsieh and M. Pedram. "Improving efficiency of the Monte Carlo power estimation,"  IEEE Trans. on VLSI Systems, Vol. 8, No. 5, Oct. 2000, pp. 584-593.

  54. X. Wu, M. Pedram, and L. Wang,"Multi-code state assignment for low power design,"  IEE Proc.-Circuits, Devices and Systems, Vol. 147, No. 5, Oct. 2000, pp. 271-275.

  55. J. Chang and M. Pedram. "Codex-DP: Codesign of communicating systems using dynamic programming,"  IEEE Trans. on Computer Aided Design, Vol. 19, No. 7, Jul. 2000, pp. 732-744.

  56. R. Marculescu, D. Marculescu and M. Pedram. "Stochastic sequential machine synthesis with application to constrained sequence generation,"  ACM Trans. on Design Automation of Electronic Systems, Vol. 5, No. 3, Jul. 2000, pp. 658-681.

  57. D. Marculescu, R. Marculescu and M. Pedram. "Theoretical bounds for switching activity analysis in finite-state machines,"  IEEE Trans. on VLSI Systems, Vol. 8, No. 3, Jun. 2000, pp. 335-339.

  58. Q. Wu, M. Pedram and X. Wu. "Clock-gating and its application to low power design of sequential circuits,"  IEEE Trans. on Circuits and Systems, Part 1, Vol. 47, No. 3, Mar. 2000, pp. 415-420.

  59. P. Cocchini and M. Pedram. "Fanout optimization using bipolar LT-trees,"  IEEE Trans. on Computer Aided Design, Vol. 19, No. 3, Mar. 2000, pp. 339-349.

  60. W. Chen, C-T. Hsieh and M. Pedram. "Simultaneous gate sizing and placement,"  IEEE Trans. on Computer Aided Design, Vol. 19, No. 2, Feb. 2000, pp. 206-214.

  61. X. Wu and M. Pedram, "Bounded algebra and current-mode digital circuits,"  Journal of Computer Science and Technology, Vol. 14, No. 6, Nov. 1999, pp. 551-557.

  62. M. Pedram and B. T. Preas, "Interconnection analysis for standard cell layouts,"  IEEE Trans. on Computer Aided Design, Vol. 18, No. 10, Oct. 1999, pp. 1512-1518.

  63. X. Wu, Q. Qiu and M. Pedram. "A synthesis methodology for ECL circuits based on mixed voltage-current representation,"  Journal of Electronics, Vol. 16, No. 4, Oct. 1999, pp. 359-366.

  64. A. Salek, J. Lou and M. Pedram. "An integrated logical and physical design flow for deep submicron circuits,"  IEEE Trans. on Computer Aided Design, Vol. 18, No. 9, Sep. 1999, pp. 1305-1315.

  65. R. Marculescu, D. Marculescu and M. Pedram. "Sequence compaction for power estimation: Theory and practice,"  IEEE Trans. on Computer Aided Design, Vol. 18. No. 7, Jul. 1999, pp. 973-993.

  66. H. Vaishnav and M. Pedram. "Delay optimal partitioning targeting low power VLSI circuits,"  IEEE Trans. on Computer Aided Design, Vol. 18. No. 6, Jun. 1999, pp. 799-812.

  67. X. Wu, Q. Wu and M. Pedram, "Synchronous derived clock and synthesis of low power sequential circuits,"  Journal of Electronics, Vol. 16, No. 2, Apr. 1999, pp. 130-145.

  68. C-Y. Tsui, M. Pedram,and A. M. Despain."Low power state assignment targeting two and multilevel logic implementations,"  IEEE Trans. on Computer Aided Design, Vol. 17. No. 12, Dec. 1998, pp. 1281-1291.

  69. Q. Wu, Q. Qiu, M. Pedram and C-S. Ding. "Cycle-accurate macro-models for RT-level power analysis,"  IEEE Trans. VLSI Systems,, Vol. 6, No. 4, Dec. 1998, pp. 520-528.

  70. C-S. Ding, C-Y. Tsui and M. Pedram. "Gate-level power estimation using tagged probabilistic simulation,"  IEEE Trans. on Computer Aided Design, Vol. 17. No. 11, Nov. 1998, pp. 1099-1107.

  71. C-T. Hsieh and M. Pedram. "Micro-processor power estimation using profile-driven program synthesis,"  IEEE Trans. on Computer Aided Design, Vol. 17. No. 11, Nov. 1998, pp. 1080-1089.

  72. E. Macii, M. Pedram and F. Somenzi. "High level power modeling, estimation and optimization,"  IEEE Trans. on Computer Aided Design, Vol. 17. No. 11, Nov. 1998, pp. 1061-1079.

  73. C-Y. Tsui and M. Pedram. "Accurate and efficient power simulation strategy by compacting the input vector set,"  Integration, the VLSI Journal, Vol. 25 (1998), pp. 37-52.

  74. C-S. Ding, Q. Wu, C-T. Hsieh and M. Pedram, "Stratified random sampling for power evaluation,"  IEEE Trans. on Computer Aided Design, Vol. 17, No. 6, Jun. 1998, pp. 465-471.

  75. R. Marculescu, D. Marculescu and M. Pedram, "Probabilistic modeling of dependencies during switching activity analysis,"  IEEE Trans. on Computer Aided Design, Vol. 17, No. 2, Feb. 1998, pp. 73-83.

  76. S. Liu, M. Pedram and A. M. Despain. "State assignment based on two-dimensional placement and hypercube mapping,"  Integration, the VLSI Journal, Vol. 24 (1997), pp. 101-118.

  77. J.-M. Chang and M. Pedram, "Energy Minimization Using Multiple Supply Voltages,"  IEEE Trans. on VLSI Systems, Vol. 5. No. 4, Dec. 1997, pp. 436-443.

  78. R. Marculescu, D. Marculescu and M. Pedram, "Vector compaction using dynamic Markov models,"  IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, Vol. E80-A, No. 10, Oct. 1997.

  79. M. Pedram and X. Wu, "A new description of CMOS circuits at switch-level with applications,"  IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences, Vol. E80-A, No. 10, Oct. 1997.

  80. J. Oh, I. Pyo and M. Pedram, "Constructing minimal spanning/Steiner trees with bounded path length,"  Integration, the VLSI Journal, Vol. 22 (1997), pp. 137-163.

  81. M. Pedram, N. Bhat and E. S. Kuh, "Combining technology mapping and layout,"  The VLSI Design: An Int'l Journal of Custom-Chip Design, Simulation and Testing, Vol. 5, No. 2 (1997), pp. 111-124.

  82. P. Tafertshofer and M. Pedram, "Factored edge-valued binary-decision diagrams,"  Formal Methods in System Design, Kluwer Academic Publishers, Vol. 10, No. 2/3 (1997), pp. 137-164.

  83. M. Pedram and H. Vaishnav, "Power optimization in VLSI layout: A survey,"  The Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology, Kluwer Academic Publishers, Vol. 15, No. 3 (1997), pp. 221-232.

  84. S. Iman and M. Pedram, "An approach for multi-level logic optimization targeting low power,"  IEEE Trans. on Computer Aided Design, Vol. 15, No. 8 (1996), pp. 889-901.

  85. Y-T. Lai, K-R. Pan and M. Pedram, "OBDD-based function decomposition: Algorithms and implementation,"  IEEE Trans. on Computer Aided Design, Vol. 15, No. 8 (1996), pp. 977-990.

  86. D. Marculescu, R. Marculescu and M. Pedram, "Information theoretic measures for power analysis,"  IEEE Trans. on Computer Aided Design, Vol. 15, No. 6 (1996), pp. 599-610.

  87. Y-T. Lai, M. Pedram and S. B. K. Vrudhula, "Formal verification using edge-valued binary decision diagrams,"  IEEE Trans. on Computers, Vol. 45, No. 2 (1996), pp. 247-255.

  88. M. Pedram, "Power minimization in IC design: Principles and applications,"  ACM Trans. on Design Automation of Electronic Systems, Vol. 1, No. 1 (1996), pp. 3-56.

  89. K. Chaudhary and M. Pedram, "Computing the area versus delay trade-off curves in technology mapping,"  IEEE Trans. on Computer Aided Design, Vol. 14, No. 12 (1995), pp. 1480-1489.

  90. C-Y. Tsui, J. Monteiro, M. Pedram, S. Devadas, A. M. Despain and B. Lin, "Power estimation in sequential logic circuits,"  IEEE Trans. on VLSI Systems, Vol. 3, No. 3 (1995), pp. 404-416 (1996 IEEE Circuits and Systems Society VLSI Systems Trans. (Best Paper Award)

  91. D. Singh, J. Rabaey, M. Pedram, F. Catthoor, S. Rajgopal, N. Sehgal and T. Mozdzen, "Power-conscious CAD tools and methodologies: A perspective,"  Proc. of the IEEE, Vol. 83, No. 4 (1995), pp. 570-594.

  92. M. Pedram, B. S. Nobandegani and B. T. Preas, "Design and analysis of segmented routing channels for row-based FPGAs,"  IEEE Trans. on Computer Aided Design, Vol. 13, No. 12 1994, pp. 1470-1479.

  93. M. Pedram, "Low power CAD: Trends and challenges,"  White paper on low power LSI technology, Nikkei Microdevices, Nikkei Business Publications, Inc., Oct. 1994, pp. 129-139.

  94. M. Pedram, "Power estimation and optimization at the logic level,"  Int'l Journal of High Speed Electronics and Systems, Vol. 5, No. 2 (1994), pp. 179-202.

  95. Y-T. Lai, M. Pedram and S. B. K. Vrudhula, "EVBDD-based algorithms for integer linear programming, spectral transformation and function decomposition,"  IEEE Trans. on Computer Aided Design, Vol. 13, No. 8 (1994), pp. 959-975.

  96. C-Y. Tsui, M. Pedram and A. M. Despain, "Power efficient technology decomposition and mapping under an extended power consumption model,"  IEEE Trans. on Computer Aided Design, Vol. 13, No. 9 (1994), pp.1110-1122.

  97. M. Pedram and E. S. Kuh, "BEAR-FP: A robust framework for floorplanning,"  Int'l Journal of High Speed Electronics and Systems, Vol. 3, No. 1 (1992), pp. 137-170.

  98. W-W. Dai, B. Eschermann, E.S. Kuh and M. Pedram, "Hierarchical placement and floorplanning for BEAR,"  IEEE Trans. on Computer Aided Design, Vol. 8, No. 12 (1989), pp. 1335-1349.

Journal Submissions in Review (Coming Attractions!)

  1. Rong and M. Pedram, "A Markovian decision-based approach for extending the lifetime of a network of battery-powered mobile devices by remote processing."

  2. W-B. Lee, K. Patel, and M. Pedram, "BBSim: A basic block characterization based simulator for accelerating micro-architectural simulation."

  3. B. Amelifard and M. Pedram, "Optimal design of the power delivery network for multiple voltage-island system-on-chips."

  4. P. Rong and M. Pedram, "A mathematical framework for hierarchical dynamic power management."

  5. B. Amelifard, F. Fallah, and M. Pedram, "Robust low leakage SRAM design using a PG-gated data retention technique."

  6. B. Amelifard and M. Pedram, "Optimal design of the power delivery network for multiple voltage-island system-on-chips."

  7. A. Abdollahi and M. Pedram, "Decision diagram-based representation and recursive bi-decomposition of quantum logic functions."

  8. E. Rokhsat-Yazdi, A. Afzali-Kusha, and M. Pedram, "A high efficiency ripple-control Buck converter with light load operation enhancement."

  9. B. Amelifard, F. Fallah, and M. Pedram, "Low-power fanout optimization using multi threshold voltages and multi channel lengths."

  10. G. Razavipour, A. Afzali-Kusha, and M. Pedram, "Design and analysis of two low power SRAM cell structures."

  11. S. Nazarian and M. Pedram, "Crosstalk effect analysis in VDSM technologies."

  12. M. Saneei, A. Afzali-Kusha, Z. Navabi, and M. Pedram, "High-performance low-power serial communication techniques for network on chips."

  13. M. Maleki and M. Pedram, "Energy-efficient random deployment of a two-level sensor network in a field."

Conference Publications

  1. M. Ghasemazar, B. Amelifard, and M. Pedram, "A mathematical solution to power optimal pipeline design by utilizing soft edge flip-flops," to appear in Proc. of Symposium on Low Power Electronics and Design, Aug. 2008.

  2. H-S. Jung, P. Rong, and M. Pedram, "Stochastic modeling of a thermally-managed multi-core system," to appear in Proc. of Design Automation Conference, Jun. 2008.

  3. M. Soltan, I-W. Hwang, and M. Pedram, "Heterogeneous modulation for trading-off energy balancing with bandwidth efficiency in hierarchical sensor networks," to appear in Proc. of Int'l Symposium on a World of Wireless, Mobile and Multimedia Networks, Jun. 2008.

  4. M. Soltan, I-W. Hwang, and M. Pedram, "Modulation-aware energy balancing in hierarchical wireless sensor networks," to appear in Proc. of Int'l Symposium on Wireless Pervasive Computing, May 2008.

  5. H. Abrishami, B. Amelifard, and M. Pedram, "NBTI-aware flip-flop characterization and design," Proc. of Great Lakes Symposium on VLSI, May 2008, pp. 29-34.

  6. S. Hatami, H. Abrishami, and M. Pedram, "Statistical timing analysis of flip-flops considering codependent setup and hold times," Proc. of Great Lakes Symposium on VLSI, May 2008, pp. 101-106.

  7. K. Patel, W-b. Lee, and M. Pedram, "In-order pulsed charge recycling in off-chip data buses," Proc. of Great Lakes Symposium on VLSI, May 2008, pp. 371-374.

  8. H-S. Jung and M. Pedram, "Improving the efficiency of power management techniques by using Bayesian classification," Proc. of Int'l Symposium on Quality of Electronic Designs, Mar. 2008, pp. 178-183.

  9. H-S. Jung and M. Pedram, "Resilient dynamic power management under uncertainty," Proc. of Design Automation and Test in Europe, Mar. 2008, pp. 224-229.

  10. E. Pakbaznia and M. Pedram, "Coarse-grain MTCMOS sleep transistor sizing using delay budgeting," Proc. of Design Automation and Test in Europe, Mar. 2008, pp. 385-390.

  11. B. Amelifard, S. Hatami, H. Fatemi, and M. Pedram, "A current source model for CMOS logic cells considering multiple input switching and stack effect," Proc. of Design Automation and Test in Europe, Mar. 2008, pp. 568-573.

  12. H-S. Jung and M. Pedram, "A stochastic local hot spot alerting technique," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2008, pp. 468-473.

  13. S. Koohi, M. Mirza-Aghatabar, S. Hessabi, and M. Pedram, "High-level modeling approach for analyzing the effects of traffic models on power and throughput in mesh-based NoCs," Proc. of the 21st Int'l Conference on VLSI Design, Jan. 2008, pp. 249-254.

  14. H-S. Jung and M. Pedram, "Continuous frequency adjustment technique based on dynamic workload prediction," Proc. of the 21st Int'l Conference on VLSI Design, Jan. 2008, pp. 415-420.

  15. E. Pakbaznia, F. Fallah, and M. Pedram, "Sizing and placement of charge recycling transistors in MTCMOS circuits," Proc. of Int'l Conference on Computer Aided Design, Nov. 2007, pp. 791-796.

  16. M. Mirza-Aghatabar, S. Koohi, S. Hessabi, and M. Pedram, "An empirical investigation of Mesh and Torus NoC topologies under different routing algorithms and traffic models," Proc. of the 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools, Aug. 2007, pp. 19-26.

  17. H. Fatemi, B. Amelifard and M. Pedram, "Power optimal MTCMOS repeater insertion for global buses," Proc. of Symposium on Low Power Electronics and Design, Aug. 2007, pp. 98-103.

  18. K. Patel, W-B. Lee, and M. Pedram, "Minimizing power dissipation during write operation to register files," Proc. of Symposium on Low Power Electronics and Design, Aug. 2007, pp. 183-188.

  19. B. Amelifard and M. Pedram, "Design of an efficient power delivery network in an SoC to enable dynamic power management," Proc. of Symposium on Low Power Electronics and Design, Aug. 2007, pp. 328-333.

  20. B. Amelifard and M. Pedram, "Optimal selection of voltage regulator modules in a power delivery network," Proc. of Design Automation Conference, Jun. 2007, pp. 168-173.

  21. H-S. Jung and M. Pedram, "A unified framework for system-level design: modeling and performance optimization of scalable networking systems," Proc. of Int'l Symposium on Quality of Electronic Designs, Mar. 2007, pp. 198-203.

  22. H-S. Jung and M. Pedram, "Dynamic Power Management under Uncertain Information," Proc. of Design Automation and Test in Europe, Apr. 2007, pp. 1060-1065.

  23. K. Patel, W-b. Lee, and M. Pedram, "Active bank switching for temperature control of the register file in a microprocessor," Proc. of Great Lakes Symposium on VLSI, Mar. 2007, pp. 231-234.

  24. C-S. Hwang, P. Rong, and M. Pedram, "Sleep transistor distribution in row-based MTCMOS designs," Proc. of Great Lakes Symposium on VLSI, Mar. 2007, pp. 235-240.

  25. H-S. Jung, A. Hwang, and M. Pedram, "Flow-Through-Queue based Power Management for Gigabit Ethernet Controller," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2007, pp. 571-576.

  26. H. Fatemi, S. Nazarian, and M. Pedram, "A Current-based Method for Short Circuit Power Calculation under Noisy Input Waveforms," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2007, pp. 774-779.

  27. M. Soltan, M. Maleki, and M. Pedram, "Lifetime-aware hierarchical wireless sensor network architecture with mobile overlays," Proc. of IEEE Radio and Wireless Symposium, Jan. 2007, pp. 325-328.

  28. M. Najibi, M. Salehi, A. Afzali Kusha, M. Pedram, S. M. Fakhraie, and H. Pedram, "Dynamic Voltage and Frequency Management Based on Variable Update Intervals for Frequency Setting," Proc. of Int'l Conference on Computer Aided Design, Nov. 2006, pp. 755-760.

  29. W-b. Lee, K. Patel and M. Pedram, "B2Sim: A fast micro-architecture simulator based on basic block characterization," Proc. of Third Int'l Conference on Hardware/Software Codesign and System Synthesis, Oct. 2006, pp. 199-204.

  30. H-S. Jung and M. Pedram, "Stochastic dynamic thermal management: A Markovian decision-based approach," Proc. of Int'l Conference on Computer Design: VLSI in Computers and Processors, Oct. 2006, pp. 452-457.

  31. W-B. Lee, K. Patel, and M. Pedram, "Dynamic thermal management for MPEG-2 decoding," Proc. of Symposium on Low Power Electronics and Design, Oct. 2006, pp. 316-321.

  32. B. Amelifard, F. Fallah, and M. Pedram, "Low-power fanout optimization using MTCMOS and Multi-Vt techniques," Proc. of Symposium on Low Power Electronics and Design, Oct. 2006, pp. 334-337.

  33. E. Pakbaznia, F. Fallah, and M. Pedram, "Charge recycling in MTCMOS circuits: concept and analysis," Proc. of Design Automation Conf, Jul. 2006, pp. 97-102.

  34. H. Fatemi, S. Nazarian, and M. Pedram, "Statistical logic cell delay analysis using a current-based model," Proc. of Design Automation Conf, Jul. 2006, pp. 253-256.

  35. W-B. Lee, A. Iranli, M. Pedram, "Backlight dimming in power-aware mobile displays," Proc. of Design Automation Conf, Jul. 2006, pp. 371-374.

  36. C-W. Kang and M. Pedram, "Low-power clustering with minimum logic replication for coarse-grained, antifuse-based FPGAs,", Proc. of Great Lakes Symposium on VLSI, Apr. 2006, pp. 79-84.

  37. H. Fatemi, S. Abbaspour, M. Pedram, A. Ajami, and E. Tuncer, "SACI: Statistical static timing analysis of coupled interconnects,", Proc. of Great Lakes Symposium on VLSI, Apr. 2006, pp. 241-246.

  38. S. Nazarian, A. Iranli, and M. Pedram, "Crosstalk analysis in nanometer technologies,", Proc. of Great Lakes Symposium on VLSI, Apr. 2006, pp. 253-258.

  39. B. Amelifard, F. Fallah and M. Pedram, "Low-leakage SRAM design with dual Vt transistors," "Low-leakage SRAM design with dual Vt transistors," Proc. of Int'l Symposium on Quality of Electronic Designs, Mar. 2006, pp. 729-734.

  40. C-S. Hwang and M. Pedram, "Gate sizing and replication to minimize the effects of virtual ground parasitic resistances in MTCMOS designs," Proc. of Int'l Symposium on Quality of Electronic Designs, Mar. 2006, pp. 741-746.

  41. S. Nazarian, M. Pedram, S.K. Gupta, and M.A. Breuer, "STAX: Statistical crosstalk target set compaction," Proc. of Design Automation and Test in Europe, Mar. 2006, pp. 172-177.

  42. A. Abdollahi and M. Pedram, "Analysis and synthesis of quantum circuits by using quantum decision diagrams," Proc. of Design Automation and Test in Europe, Mar. 2006, pp. 317-322.

  43. S. Abbaspour, H. Fatemi, and M. Pedram, "Parameterized block-based non-Gaussian statistical interconnect timing analysis," Proc. of Design Automation and Test in Europe, Mar. 2006, pp. 533-538.

  44. S. Nazarian and M. Pedram, "Cell delay analysis based on rate-of-current change," Proc. of Design Automation and Test in Europe, Mar. 2006, pp. 539-544.

  45. B. Amelifard, F. Fallah and M. Pedram, "Reducing the sub-threshold and gate-tunneling leakage of SRAM cells using dual-Vt and dual-Tox assignment," Proc. of Design Automation and Test in Europe, Mar. 2006, pp. 995-1000.

  46. P. Rong and M. Pedram, "Determining the optimal timeout values for a power-managed system based on the theory of Markovian processes: Offline and online algorithms," Proc. of Design Automation and Test in Europe, Mar. 2006, pp. 1128-1133.

  47. S. Nazarian and M. Pedram, "CGTA: Current gain-based timing analysis for logic cells," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2006, pp. 67-72.

  48. C-S. Hwang and M. Pedram, "Timing-driven placement based on monotone cell ordering constraints," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2006, pp. 201-206.

  49. P. Rong and M. Pedram, "Power-aware scheduling and dynamic voltage setting for tasks running on a hard real-time system," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2006, pp. 473-478.

  50. S. Abbaspour, H. Fatemi, and M. Pedram, "Parameterized block-based non-Gaussian statistical gate timing analysis," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2006, pp. 947-952.

  51. S. Abbaspour, H. Fatemi, and M. Pedram, "VGTA: Variation-aware gate timing analysis," Proc. of Int'l Conference on Computer Design: VLSI in Computers and Processors, Oct. 2005, pp. 351-356.

  52. B. Amelifard, F. Fallah, and M. Pedram, "Low-power fanout optimization using multiple threshold voltage inverters," Proc. of Symposium on Low Power Electronics and Design, Aug. 2005, pp. 95-98.

  53. A. Iranli, M. Maleki, and M. Pedram, "Energy-efficient strategies for deployment of a two-level wireless sensor network," Proc. of Symposium on Low Power Electronics and Design, Aug. 2005, pp. 233-238.

  54. P. Rong and M. Pedram, "Hierarchical dynamic power management with application scheduling," Proc. of Symposium on Low Power Electronics and Design, Aug. 2005, pp. 269-274.

  55. A. Abdollahi, F. Fallah, and M. Pedram, "An effective power mode transition technique in MTCMOS circuits," Proc. of Design Automation Conference, Jun. 2005, pp. 37-42.

  56. A. Abdollahi and M. Pedram, "A new canonical form for fast Boolean matching in logic synthesis and verification," Proc. of Design Automation Conference, Jun. 2005, pp. 379-384. (Best Paper Award)

  57. A. Iranli and M. Pedram, "DTM: Dynamic tone mapping for backlight scaling," Proc. of Design Automation Conference, Jun. 2005, pp. 612-617.

  58. S. Nazarian, M. Pedram, and E. Tuncer"An empirical study of crosstalk in VDSM technologies," Proc. of Great Lakes Symposium on VLSI, Apr. 2005, pp. 317-322.

  59. S. Abbaspour, H. Fatemi, and M. Pedram, "VITA: Variation-aware interconnect timing analysis for symmetric and skewed sources of variation considering variational ramp input," Proc. of Great Lakes Symposium on VLSI, Apr. 2005, pp. 426-430.

  60. M. Maleki and M. Pedram, "QoM and lifetime-constrained random deployment of sensor networks for minimum energy consumption," The Fourth International Conference on Information Processing in Sensor Networks, April 2005.

  61. A. Iranli, H. Fatemi, and M. Pedram, "Lifetime-aware intrusion detection under safeguarding constraints-ENIS-1 problem," The Fourth International Conference on Information Processing in Sensor Networks, April 2005.

  62. A. Abdollahi, F. Fallah, and M. Pedram, "Analysis and optimization of static power considering transition dependency of leakage current in VLSI circuits," Proc. of Int'l Symposium on Quality of Electronic Designs, Mar. 2005, pp. 77-82.

  63. B. Amelifard, F. Fallah, and M. Pedram, "Closing the gap between carry select adder and ripple carry adder: A new class of low-power high-performance adders," Proc. of Int'l Symposium on Quality of Electronic Designs, Mar. 2005, pp. 148-152.

  64. S. Nazarian, M. Pedram, E. Tuncer, and T. Lin, "Sensitivity-based gate delay propagation in static timing analysis," Proc. of Int'l Symposium on Quality of Electronic Designs, Mar. 2005, pp. 536-541.

  65. A. Iranli, H. Fatemi, and M. Pedram, "HEBS: Histogram equalization for backlight scaling," Proc. of Design Automation and Test in Europe, Mar. 2005, pp. 346-351.

  66. S. Nazarian and M. Pedram, "Modeling and propagation of noisy waveforms in static timing analysis," Proc. of Design Automation and Test in Europe, Mar. 2005, pp. 776-777.

  67. C-W. Kang and M. Pedram, "PackGen: A clustering technique for mapping coarse-grained, antifuse-based FPGAs," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2005, pp. 785-790.

  68. C-S. Hwang and M. Pedram, "PMP: Performance-driven multilevel partitioning by aggregating the preferred signal directions of I/O conduits," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2005, pp. 428-431.

  69. K. Choi, W. Lee, R. Soma and M. Pedram, "Dynamic voltage and frequency scaling under a precise energy model considering variable and fixed components of the system power dissipation," Proc. of Int'l Conference on Computer Aided Design, Nov. 2004, pp. 29-34.

  70. K. Choi, R. Soma and M. Pedram, "Dynamic voltage and frequency scaling based on workload decomposition," Proc. of Symposium on Low Power Electronics and Design, Aug. 2004, pp. 174-179.

  71. K. Choi, R. Soma and M. Pedram, "Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding," Proc. of 41st Design Automation Conference, Jun. 2004, pp. 544-549.

  72. S. Abbaspour, A. Ajami, M. Pedram, and E. Tuncer, "TFA: A threshold-based filtering algorithm for propagation delay and output slew calculation of high-speed VLSI interconnects,"  Proc. of Great Lakes Symposium on VLSI, Apr. 2004, pp. 19-24.

  73. M. Maleki and M. Pedram, "Lifetime-aware multicast routing in wireless ad hoc networks,"  Proc. of IEEE Wireless Communication and Networking Conference, Mar. 2004, pp. 1317- 1323.

  74. R. Marculescu, M. Pedram, and J. Henkel, "Distributed multimedia system design: A holistic perspective," Proc. of Design Automation and Test in Europe, Feb. 2004, Vol. 2, pp. 21342.

  75. K. Choi, R. Soma and M. Pedram, "Fine-grained dynamic voltage and frequency scaling for precise energy and performance trade-off based on the ratio of off-chip access to on-chip computation times," Proc. of Design Automation and Test in Europe, Feb. 2004, Vol. 1, pp. 10004.

  76. W-C. Cheng, Y. Hou and M. Pedram, "Power minimization in a backlit TFT-LCD display by concurrent brightness and contrast scaling," Proc. of Design Automation and Test in Europe, Feb. 2004, Vol. 1, pp. 10252.

  77. A. Iranli, K. Choi and M. Pedram, "A game theoretic approach to low energy wireless video streaming," Proc. of Design Automation and Test in Europe, Feb. 2004, Vol. 1, pp. 10696.

  78. S. Abbaspour and M. Pedram, "Gate delay calculation considering the crosstalk capacitances," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2004, pp. 853-858.

  79. H. Shim, N. Chang, and M. Pedram, "A compressed frame buffer to reduce display power consumption in mobile systems," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2004, pp. 819-824.

  80. C-S. Hwang and M. Pedram, "Interconnect design methods for memory," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2004, pp. pp. 438-443.

  81. C-W. Kang, A. Iranli, and M. Pedram, "Technology Mapping and Packing for Coarse-Grained, Anti-Fuse Based FPGAs," Proc. of Asia and South Pacific Design Automation Conference, Jan. 2004, pp. 209-211.

  82. A. Iranli, H. Fatemi, and M. Pedram, "A Game Theoretic Approach to Dynamic Energy Minimization in Wireless Transceivers,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 2003, pp. 504-509.

  83. A. Abdollahi, F. Fallah, and M. Pedram, "Precomputation-based Guarding for Dynamic and Leakage Power Reduction,"  Proc. of Int'l Conference on Computer Design: VLSI in Computers and Processors, Oct. 2003, pp. 90-97.

  84. F. Tari, P. Rong, and M. Pedram, "An Energy-aware Simulation Model and a Transaction Protocol for Dynamic Workload Distribution in Mobile Ad Hoc Networks,"  Proc. of Int'l Conference on Computer Design: VLSI in Computers and Processors, Oct. 2003, pp. 444-449.

  85. K. Choi, K. Kim, and M. Pedram, "Energy-aware MPEG-4 FGS streaming,"  Proc. of 40th Design Automation Conference, Jun. 2003, pp. 912-915.

  86. P. Rong and M. Pedram, "Extending the lifetime of a network of battery-powered mobile devices by remote processing: a Markovian decision-based approach,"  Proc. of 40th Design Automation Conference, Jun. 2003, pp. 906-911.

  87. C-W. Kang, S. Abbaspour, and M. Pedram, "Buffer sizing for minimum energy-delay product by using an approximating polynomial,"  Proc. of Great Lakes Symposium on VLSI, Apr. 2003, pp. 112-115.

  88. M. Maleki, K. Dantu, and M. Pedram, "Lifetime Prediction Routing in Mobile Ad Hoc Networks,"  Proc. of IEEE Wireless Communication and Networking Conference, Mar. 2003, pp. 1185-1190.

  89. A. H. Ajami, K. Banerjee, A. Mehrotra, and M. Pedram, "Analysis of IR-drop scaling with implications for deep submicron P/G network designs," Proc. of Int'l Symposium on Quality of Electronic Designs, Mar. 2003, pp. 35-40.

  90. S. Abbaspour, M. Pedram and P. Heydari, "Optimizing the energy-delay-ringing product in on-chip CMOS line drivers,"  Proc. of Int'l Symposium on Quality of Electronic Designs, Mar. 2003, pp. 261-266.

  91. P. Rong and M. Pedram, "Remaining battery capacity prediction for Lithium-ion batteries,"  Proc. of Design Automation and Test in Europe, Mar. 2003, pp. 1148-1149.

  92. W-C. Chung and M. Pedram, "Chromatic encoding: a low power encoding technique for the digital visual interface,"  Proc. of Design Automation and Test in Europe, Mar. 2003, pp. 694-699.

  93. Y. Aghaghiri, F. Fallah, and M. Pedram, "BEAM: bus encoding based on instruction-set-aware memories,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2003, pp. 3-8.

  94. S. Abbaspour and M. Pedram, "Calculating the effective capacitance for the RC interconnect in VDSM technologies,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2003, pp. 43-48.

  95. C-W. Kang and M. Pedram, "Technology mapping for low leakage power and high speed with hot-carrier effect consideration,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2003, pp. 203-208.

  96. A. Iranli, P. Rezvani, and M. Pedram, "Low power synthesis of finite state machines with mixed D and T flip-flops,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2003 pp. 803-808.

  97. K. Choi, K. Dantu, W-C. Cheng, and M. Pedram, "Frame-based dynamic voltage and frequency scaling for a MPEG decoder,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 2002, pp. 732-737.

  98. P. Rong and M. Pedram, "Battery-aware power management based on markovian decision processes,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 2002, pp. 712-717.

  99. A. Abdollahi, F. Fallah, and M. Pedram, "Runtime mechanisms for leakage current reduction in CMOS VLSI circuits,"  Proc. of Symposium on Low Power Electronics and Design, Aug. 2002, pp. 190-195.

  100. Y. Aghaghiri, F. Fallah, and M. Pedram, "Reducing transitions on memory buses using sector-based encoding technique,"  Proc. of Symposium on Low Power Electronics and Design, Aug. 2002, pp. 190-195.

  101. M. Maleki, K. Dantu, and M. Pedram, "Power-aware source routing protocol for mobile ad hoc networks," Proc. of Symposium on Low Power Electronics and Design, Aug. 2002, pp. 72-75.

  102. P. Heydari, S. Abbaspour and M. Pedram, "A comprehensive study of energy dissipation in lossy transmission lines driven by CMOS inverters,"  Proc. of IEEE Custom Integrated Circuits Conference, May 2002.

  103. Y. Aghaghiri, F. Fallah, and M. Pedram, "ALBORZ: address level bus power optimization,"  Proc. of Int'l Symposium on Quality of Electronic Designs, Mar. 2002, pp. 470-475.

  104. P. Rezvani and M. Pedram, "Concurrent and Selective Logic Extraction with Timing Consideration,"  Proc. of Design Automation and Test in Europe, Mar. 2002, pp. 1086.

  105. Y. Aghaghiri, F. Fallah, and M. Pedram, "EZ Encoding: A Class of Irredundant Low Power Codes for Data Address and Multiplexed Address Buses,"  Proc. of Design Automation and Test in Europe, Mar. 2002, pp. 1102.

  106. W. Chen, M. Pedram, and P. Buch, "Buffered routing tree construction under buffer placement blockages,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2002, pp. 381-386.

  107. P. Heydari and M. Pedram, "Interconnect energy dissipation modeling in high-speed ULSI circuits,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2002, pp. 132-137

  108. W-C. Cheng and M. Pedram, "Software-only bus encoding techniques for an embedded system,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2002, pp. 126-131

  109. A. Ajami, K. Banarjee and M. Pedram, "Analysis of substrate thermal gradient effects on optimal buffer insertion,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 2001, pp. 44-48.

  110. P. Heydari and M. Pedram, "Model reduction of variable-geometry interconnects using variational spectrally-weighted balanced truncation,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 2001, pp. 586-591.

  111. P. Heydari and M. Pedram, "Jitter-induced power/ground noise in CMOS PLLs: a design perspective,"  Proc. of Int'l Conference on Computer Design: VLSI in Computers and Processors, Sep. 2001, pp. 209-213.

  112. P. Heydari and M. Pedram, "Analysis and reduction of capacitive coupling noise in high-speed VLSI circuits,"  Proc. of Int'l Conference on Computer Design: VLSI in Computers and Processors, Sep. 2001, pp. 104-109.

  113. Y. Aghaghiri, F. Fallah, and M. Pedram, "Irredundant address bus encoding for low power,"  Proc. of Symposium on Low Power Electronics and Design, Aug. 2001, pp. 82-187.

  114. A. Ajami, K. Banerjee, and M. Pedram, "Non-uniform chip-temperature dependent signal integrity,"  Proc. of IEEE Symposium on VLSI Technology and Circuits, Jun. 2001, pp. 145-146.

  115. Q. Qiu, Q. Wu and M. Pedram, "Dynamic power management in a mobile multimedia system with guaranteed quality-of-service,"  Proc. of 38th Design Automation Conference, Jun. 2001, pp. 834-839.

  116. A. Ajami, K. Banerjee, M. Pedram, and L.van Ginneken, "Analysis of non-uniform temperature-dependent interconnect performance in high performance ICs" Proc.of 38th Design Automation Conference, Jun.2001,pp.567-572.

  117. A. Ajami, K. Banerjee, and M. Pedram, "Effects of non-uniform substrate temperature on the clock signal integrity in high performance designs,"  Proc. of IEEE Custom Integrated Circuits Conference, May 2001, pp. 233-236.

  118. K. Banerjee, M. Pedram, and A. Ajami, "Analysis and optimization of thermal issues in high performance VLSI,"  Proc. of Int'l Symposium on Physical Design, Apr. 2001, pp. 230-237.

  119. C-T Hsieh, L-S. Chen, and M. Pedram, "Microprocessor power analysis by labeled simulation,"  Proc. of Design Automation and Test in Europe, Mar. 2001, pp. 182-189.

  120. W-C. Cheng and M. Pedram, "Memory bus encoding for low power: a tutorial," Proc. of Int'l Symposium on Quality of Electronic Designs, Mar. 2001.

  121. A. Ajami and M. Pedram, "Post-layout timing-driven cell placement using an accurate net length model with movable Steiner points,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2001, pp.595-600.

  122. W-C. Cheng and M. Pedram, "Low power techniques for address encoding and memory allocation,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2001, pp. 245-250.

  123. M. Pedram, "Power management and optimization in embedded systems,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2001, pp. 239-244.

  124. P. Heydari and M. Pedram, "Balanced truncation with spectral shaping for RLC interconnects,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2001, 203-208.

  125. W. Chen and M. Pedram, "Simultaneous gate sizing and fanout optimization,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 2000, pp. 374-378.

  126. P. Heydari and M. Pedram, "Analysis and optimization of ground bounce in digital CMOS circuits," Proc. of Int'l Conference on Computer Design: VLSI in Computers and Processors, Sep. 2000, pp. 121-126. (Best Paper Award)

  127. W-C. Cheng and M. Pedram, "Power-optimal encoding for DRAM address bus,"  Proc. of Symposium on Low Power Electronics and Design, Jul. 2000, pp. 250-252.

  128. X. Wu and M. Pedram, "Low power sequential circuit design by using priority encoding and clock gating,"  Proc. of Symposium on Low Power Electronics and Design, Jul. 2000, pp. 143-148.

  129. Q. Qiu, Q. Wu and M. Pedram, "OS-directed power management for mobile electronic systems,"  Proc. of the 39th Power Source Conference, Jun. 2000, pp. 506-509.

  130. X. Wu and M. Pedram, "Propagation algorithm of behavior probability in power estimation based on multiple-valued logic,"  Proc. of Int'l Symposium on Multiple-Valued Logic, May 2000, pp. 453-459.

  131. S. Ou and M. Pedram, "Timing-driven placement based on partitioning with dynamic cut-net control,"  Proc. of 37th Design Automation Conference, Jun. 2000, pp. 472-476.

  132. Q. Wu, Q. Qiu and M. Pedram, "Dynamic power management of complex systems using generalized stochastic Petri nets,"  Proc. of 37th Design Automation Conference, Jun. 2000, pp. 352-356.

  133. P. Heydari and M. Pedram, "Analysis of jitter due to power-supply noise in phase-locked loops,"  Proc. of IEEE Custom Integrated Circuits Conference, May 2000.

  134. C-T. Hsieh and M. Pedram, "Architectural power optimization by bus splitting,"  Proc. of Design Automation and Test in Europe, Mar. 2000, pp. 612.

  135. Q. Wu, Q. Qiu and M. Pedram, "An interleaved dual-battery power supply for battery-operated electronics,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2000, pp. 387-390.

  136. X. Wu, J. Wei, M. Pedram and Q. Wu, "Low power design of sequential circuits using a quasi-synchronous derived clock,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2000, pp. 345-350.

  137. M. Pedram and X. Wu, "Analysis of clocked-power CMOS with application to the design of energy recovery circuits,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 2000, pp. 339-344.

  138. J. Lou, W. Chen and M. Pedram, "Concurrent logic restructuring and placement for timing closure,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 1999, pp. 31-35.

  139. P. Rezvani, A. Ajami, M. Pedram and H. Savoj, "LEOPARD: A logical effort-based fanout optimizer for area and delay,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 1999, pp. 516-519.

  140. Q. Qiu, Q. Wu and M. Pedram, "Stochastic modeling of a power-managed system: construction and optimization,"  Proc. of Symposium on Low Power Electronics and Design, Aug. 1999, pp. 194-199.

  141. R. Marculescu, D. Marculescu and M. Pedram, "Non-stationary effects in trace-driven power analysis,"  Proc. of Symposium on Low Power Electronics and Design, Aug. 1999, pp. 133-138.

  142. M. Pedram and Q. Wu, "Design considerations for battery-powered electronics,"  Proc. of 36th Design Automation Conference, Jun. 1999, pp. 861-866.

  143. Q. Qiu and M. Pedram, "Dynamic power management based on continuous-time Markov decision processes,"  Proc. of 36th Design Automation Conference, Jun. 1999, pp. 555-561.

  144. A. Salek, J. Lou and M. Pedram, "MERLIN: Semi-order-dependent hierarchical buffered routing tree generation using local neighborhood search,"  Proc. of 36th Design Automation Conference, Jun. 1999, pp. 472-478.

  145. W. Chen, C-T. Hsieh and M. Pedram, "Gate sizing with controlled displacement,"  Proc. of Int'l Symposium on Physical Design, Apr. 1999, pp. 127-132.

  146. J. Chang and M. Pedram, "Codex-DP: codesign of communicating systems using dynamic programming,"  Proc. of Design Automation and Test in Europe, Mar. 1999, pp. 568-573.

  147. M. Pedram and Q. Wu, "Battery-powered digital CMOS design,"  Proc. of Design Automation and Test in Europe, Mar. 1999, pp. 72-76.

  148. M. Pedram, C-Y. Tsui and Q. Wu, "An integrated battery-hardware model for portable electronics,"  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1999, pp. 109-112.

  149. P. Rabiei and M. Pedram, "Model order reduction of large circuits using balanced truncation,"  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1999, pp. 237-240.

  150. S. Ou and M. Pedram, "Timing-driven bipartitioning with replication using iterative quadratic programming,"  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1999, pp. 105-108.

  151. A. Salek, J. Lou and M. Pedram, "A simultaneous routing tree construction and fanout optimization algorithm,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 1998, pp. 625-630.

  152. P. Cocchini, M. Pedram, G. Piccinini and M. Zamboni, "Fanout optimization under a submicron transistor-level delay model,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 1998, pp. 551-556.

  153. C-S. Ding, C-T. Hsieh and M. Pedram, "Improving sampling efficiency for total power estimation at the system level,"  Proc. of Symposium on Low Power Electronics and Design, Aug. 1998.

  154. D. Marculescu, R. Marculescu and M. Pedram, "Theoretical bounds for switching activity analysis in finite-state machines,"  Proc. of Symposium on Low Power Electronics and Design, Aug. 1998.

  155. Q. Qiu, Q. Wu and M. Pedram, "Maximum power estimation using the limiting distributions of extreme order statistics,"  Proc. of 35th Design Automation Conference, Jun. 1998, pp. 684-689.

  156. A. Salek, J. Lou and M. Pedram, "A DSM design flow: putting floorplanning, technology mapping and gate placement together,"  Proc. of 35th Design Automation Conference, Jun. 1998, pp. 287-290.

  157. J. Oh and M. Pedram, "Multi-pad power/ground network design for uniform distribution of ground bounce,"  Proc. of 35th Design Automation Conference, Jun. 1998, pp. 128-133.

  158. P. Heydari and M. Pedram, "Calculation of ramp response of lossy transmission lines using two-port network functions,"  Proc. of of Int'l Symposium on Physical Design, Apr. 1998, pp. 152-157.

  159. D. Marculescu, R. Marculescu and M. Pedram, "Trace-driven steady-state probability estimation in FSMs with application to power estimation,"  Proc. of Design Automation and Test in Europe, Feb. 1998, pp. 774-779.

  160. J. Oh and M. Pedram, "Gated clock routing minimizing the switched capacitance,"  Proc. of Design Automation and Test in Europe, Feb. 1998, pp. 692-697.

  161. M. Pedram, "Logical-physical co-design for deep submicron circuits: challenges and solutions,"  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1998, pp. 137-142.

  162. J. Lou, A. Salek and M. Pedram, "An integrated flow for technology remapping and placement of sub-half-micron circuits,"  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1998, pp. 295-300.

  163. J. Oh and M. Pedram, "Power reduction in microprocessor chips by gated clock routing,"  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1998, pp. 313-318.

  164. Q. Wu, M. Pedram and X. Wu, "A new design of double edge triggered flip-flops,"  Proc. of Asia and South Pacific Design Automation Conference, Feb. 1998, pp. 417-421.

  165. J. Lou, A. Salek and M. Pedram, "An exact solution to simultaneous technology mapping and linear placemef. on Computer Design: VLSI in Computers and Processors, Oct. 1997, pp. 130-135.

  166. R. Marculescu, D. Marculescu and M. Pedram, "Block entropy and high-order temporal effects in composite sequence compacton for finite state machines,"  Proc. of Symposium on Low Power Electronics and Design, Aug. 1997, 190-195.

  167. Q. Qiu, Q. Wu, M. Pedram and C-S. Ding, "Cycle-accurate macro-models for RT-level power analysis,"  Proc. of Symposium on Low Power Electronics and Design, Aug. 1997, pp. 125-130.

  168. R. Marculescu, D. Marculescu and M. Pedram, "Sequence compacton for probabilistic analysis of finite state machines,"  Proc. of 34th Design Automation Conference, Jun. 1997, pp. 12-15.

  169. C-S. Ding, Q. Wu, C-T. Hsieh and M. Pedram, "Statistical estimation of the cumulative distribution function for power dissipation in VLSI circuits,"  Proc. of 34th Design Automation Conference, Jun. 1997, pp. 371-376.

  170. C-Y. Tsui, K-K. Chan, Q. Wu, C-S. Ding and M. Pedram, "A power estimation framework for designing low power portable video applications,"  Proc. of 34th Design Automation Conference, Jun. 1997, pp. 421-424.

  171. E. Macii, M. Pedram and F. Somenzi, "High level power modeling, estimation and optimization,"  Proc. of 34th Design Automation Conference, Jun. 1997, pp. 504-510.

  172. R. Marculescu, D. Marculescu and M. Pedram, "Hierarchical sequence compaction for power estimation,"  Proc. of 34th Design Automation Conference, Jun. 1997, pp. 570-575.

  173. C-T. Hsieh, M. Pedram, H. Mehta and F. Rastgar, "Profile-driven program synthesis for evaluation of system power dissipation,"  Proc. of 34th Design Automation Conference, Jun. 1997, pp. 576-581.

  174. X. Wu and M. Pedram, "Design of ternary CCD circuits referencing to current mode CMOS circuits,"  Proc. of Int'l Symposium on Multiple-Valued Logic, May 1997, pp. 209-214.

  175. Q. Wu, M. Pedram and X. Wu, "Clock-gating and its application to low power design of sequential circuits,"  Proc. of IEEE Custom Integrated Circuits Conference, May 1997, pp. 479-482.

  176. Q. Wu, M. Pedram and X. Wu, "A note on the relationship between signal probability and switching activity,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 1997, pp. 117-120.

  177. R. Marculescu, D. Marculescu and M. Pedram, "Adaptive models for input data compaction for power simulators,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 1997, pp. 391-396.

  178. Q. Wu, C-S. Ding, C-T. Hsieh and M. Pedram, "Statistical design of macro-models for RT-level power evaluation,"  Proc. of Asia and South Pacific Design Automation Conference, Jan. 1997, pp. 523-528.

  179. M. Pedram and X. Wu, "A new description of CMOS circuits at switch-level,"  Proc. Asia and South Pacific Design Automation Conference, Jan. 1997, pp. 551-556.

  180. C-T. Hsieh, C-S. Ding, Q. Wu and M. Pedram, "Statistical sampling and regression estimation in power macromodeling,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 1996, pp. 583-588.

  181. C-S. Ding, C-T. Hsieh, Q. Wu and M. Pedram, "Stratified random sampling for power estimation,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 1996, pp. 577-582.

  182. J-M. Chang and M. Pedram, "Module assignment for low power,"  Proc. of European Design Automation Conference, Sep. 1996, pp. 376-381.

  183. J-M. Chang and M. Pedram, "Energy minimization using multiple supply voltages,"  Proc. of Symposium on Low Power Electronics and Design, Aug. 1996, pp. 157-162.

  184. R. Marculescu, D. Marculescu and M. Pedram, "Stochastic sequential machine synthesis targeting constrained sequence generation,"  Proc. of 33rd Design Automation Conference, Jun. 1996, page 696-701.

  185. J. Oh, I. Pyo and M. Pedram, "Constructing lower and upper bounded delay routing trees using linear programming,"  Proc. of 33rd Design Automation Conference, Jun. 1996, page 401-404.

  186. C-Y. Tsui, D. Marculescu, R. Marculescu and M. Pedram, "Reducing the runtime of simulation-based power estimation by input vector compaction,,"  Proc. of 33rd Design Automation Conference, Jun. 1996, page 165-168.

  187. S. Iman and M. Pedram, "POSE: Power optimization and synthesis environment,"  Proc. of 33rd Design Automation Conference, Jun. 1996, page 21-26. (Best Paper Award)

  188. I. Pyo, J. Oh and M. Pedram, "Constructing routing trees with bounded difference Elmore delay,"  Proc. of IEEE Int'l Symposium Circuits and Systems, May 1996, page.

  189. K-R. Pan and M. Pedram, "FPGA synthesis for minimum area, delay and power consumption," Proc. of European Design and Test Conference, Mar. 1996, page 603.

  190. I. Pyo, J. Oh and M. Pedram, "Constructing minimal spanning/Steiner trees with bounded path length,"  Proc. of European Design and Test Conference, Mar. 1996, pp. 244-249.

  191. S. Iman and M. Pedram, "Two-level logic minimization for low power," Proc. of Int'l Conference on Computer Aided Design, Nov. 1995, pp. 433-438.

  192. H. Vaishnav and M. Pedram, "Delay optimal partitioning targeting low power VLSI circuits," Proc. of Int'l Conference on Computer Aided Design, Nov. 1995, pp. 638-643.

  193. C-S. Ding and M. Pedram, "Tagged probabilistic simulation provides accurate and efficient power estimates at the gate level,"  Proc. of Symposium of Low Power Electronics, Sep. 1995, pp. 42-43.

  194. H. Vaishnav and M. Pedram, "Logic extraction based on normalized netlengths," Proc. of Int'l Conference on Computer Design: VLSI in Computers and Processors, Oct. 1995, pp. 658-663.

  195. R. Marculescu, D. Marculescu and M. Pedram, "Efficient power estimation for highly correlated input streams,"  Proc. of 32nd Design Automation Conference, Jun. 1995, pp. 628-634.

  196. J-M. Chang and M. Pedram, "Low power register allocation and binding,"  Proc. of 32nd Design Automation Conference, Jun. 1995, pp. 29-35.

  197. S. Iman and M. Pedram, "Logic extraction and decomposition for low power," Proc. 32nd Design Automation Conference, pp. 248-253, Jun. 1995.

  198. H. Vaishnav and M. Pedram, "Minimizing the routing cost during logic extraction," Proc. of 32nd Design Automation Conference, pp. 70-75, Jun. 1995.

  199. S-M. Liu, M. Pedram and A. M. Despain, "A fast state assignment procedure for synchronous FSMs," Proc. of 32nd Design Automation Conference, pp. 327-332, Jun. 1995.

  200. M. Pedram, "CAD for Low power: status and promising directions,"  Proc. of Int'l Symposium on VLSI Technology, Systems and Applications, Jun. 1995.

  201. S-M. Liu, M. Pedram and A. M. Despain, "Plato_P: PLA timing optimization by partitioning," Proc. of 1995 IEEE Int'l Symposium Circuits and Systems, May 1995.

  202. D. Marculescu, R. Marculescu and M. Pedram. "Information theoretic measures for energy consumption at register transfer level,"  Proc. of Int'l Symposium of Low Power Design, Apr. 1995, pp. 81-86.

  203. C-Y. Tsui, M. Pedram, C-H. Chen and A. M. Despain, "Low power state assignment targeting two- and multi-level logic implementations," Proc. of Int'l Conference on Computer Aided Design, Nov. 1994, pp. 82-87.

  204. S. Iman and M. Pedram, "Multi-level network optimization for low power," Proc.of Int'l Conference on Computer Aided Design, Nov. 1994, pp. 372-377.

  205. R. Marculescu, D. Marculescu and M. Pedram, "Switching activity estimation considering spatiotemporal correlations,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 1994, pp. 294-299.

  206. D. Mukherjee, M. Pedram and M. Breuer, "Control strategies for chip-based DFT/BIST hardware," Proc. of Int'l Test Conference, Oct. 1994, pp. 893-902.

  207. K-R. Pan, Y-T. Lai and M. Pedram, "FPGA Synthesis using OBDD-based function decomposition," Proc. of Int'l Conference on Computer Design: VLSI in Computers and Processors, Oct. 1994, pp. 30-35.

  208. S. Iman, M. Pedram and K. Chauduary, "Technology mapping using fuzzy logic," Proc. of 31st Design Automation Conference, Jun. 1994, pp. 333-338.

  209. C-Y. Tsui, M. Pedram and A. M. Despain, "Exact and approximate methods for calculating signal and transition probabilities in FSMs," Proc. of 31st Design Automation Conference, Jun. 1994, pp. 18-23.

  210. Y-T. Lai, M. Pedram and S. B. K. Vrudhula, "FGILP: an integer linear program solver based on function graphs," Proc.of Int'l Conference on Computer Aided Design, Nov. 1993, pp. 685-689.

  211. D. Mukherjee, M. Pedram and M. Breuer, "Merging multiple FSM controllers for DFT/BIST hardware," Proc. of Int'l Conference on Computer Aided Design, Nov. 1993, pp. 720-725.

  212. M. Pedram, B. S. Nobandegani and B. T. Preas, "Architecture and routability analysis for row-based FPGAs,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 1993, pp. 230-235.

  213. C-Y. Tsui, M. Pedram and A. M. Despain, "Efficient estimation of dynamic power dissipation under a real delay model,"  Proc. of Int'l Conference on Computer Aided Design, Nov. 1993, pp. 224-228.

  214. C-Y. Tsui, M. Pedram and A. M. Despain, "Power estimation considering charging and discharging of internal nodes of CMOS gates,"  Proc. of the Synthesis and Simulation Meeting and Int'l Interchange, Oct. 1993, pp. 345-354.

  215. H. Vaishnav and M. Pedram, "PCUBE: performance driven placement algorithm for low power," Proc. of European Design Automation Conference, Sep. 1993, pp. 72-77.

  216. C-Y. Tsui, M. Pedram and A. M. Despain, "Technology decomposition and mapping targeting low power dissipation,"  Proc. of 30th Design Automation Conference, Jun. 1993, pp. 68-73.

  217. Y-T. Lai, M. Pedram and S. Sastry, "BDD based decomposition of logic functions with application to FPGA synthesis,"  Proc. of 30th Design Automation Conference, Jun. 1993, pp. 230-235.

  218. H. Vaishnav and M. Pedram, "Routability driven fanout optimization," Proc. of 30th Design Automation Conference, Jun. 1993, pp. 642-647.

  219. M. Pedram and H. Vaishnav, "Technology decomposition using optimal alphabetic trees," Proc. of European Conference on Design Automation, Feb. 1993, pp. 573-577.

  220. S-M. Liu, K-R. Pan, M. Pedram and A. M. Despain, "Alleviating routing congestion by combining logic resynthesis and linear placement,"  Proc. of European Conference on Design Automation, Feb. 1993, pp. 578-582

  221. Y-T. Lai, S. Sastry (a.k.a. S. B. K. Vrudhula), and M. Pedram, "Boolean matching using BDDs with applications in logic synthesis and verification," Proc. of Int'l Conference Computer Design: VLSI in Computers and Processors, Oct. 1992, pp. 452-458.

  222. D. Mukherjee, M. Pedram, and M. Breuer, "Minimal area merger of FSM controllers," Proc. of European Design Automation Conference, Sep. 1992, pp. 278-283.

  223. K. Chaudhary and M. Pedram, "A near-optimal algorithm for technology mapping minimizing area under delay constraints," Proc. of 29th Design Automation Conference, Jun. 1992, pp. 492-498.

  224. M. Pedram and N. Bhat, "Layout driven logic restructuring and decomposition,"  Proc. of Int'l Conference Computer Aided Design, Nov. 1991, pp. 134-137.

  225. S. Mayrhofer, M. Pedram and U. Lauther, "A flow-based approach to the placement of Boolean networks,"  Proc. of IFIP Int'l Conference on VLSI, 1991.

  226. M. Pedram, K. Chaudhary and E. S. Kuh, "I/O pad assignment based on circuit structure,"  Proc. of Int'l Conference Computer Design: VLSI in Computers and Processors, Sep. 1991, pp. 314-318.

  227. M. Pedram and N. Bhat, "Layout driven technology mapping,"  Proc. of 28th Design Automation Conference, Jun. 1991, pp. 99-105.

  228. M. Pedram, M. Marek-Sadowska and E. S. Kuh, "Floorplanning with pin assignment,"  Proc. of Int'l Conference Computer Aided Design, Nov. 1990, pp. 98-101 (Distinguished Paper Award for ICCAD 1990).

  229. E. S. Kuh, A. Srinivasan, M. A. B. Jackson, M. Pedram, Y. Ogawa and M. Marek-Sadowska,"Timing-driven layout,"  Proc. of the Synthesis and Simulation Meeting and Int'l Interchange, Oct. 1990, pp. 263-270.

  230. M. Pedram and B. T. Preas, "Floorplanning with accurate shape constraints for the cells,"  Proc. of Int'l Conference Computer Design: VLSI in Computers and Processors, Sep. 1990, pp. 332-338.

  231. M. Pedram, Y. Ogawa and E. S. Kuh, "Timing-driven placement for general cell layouts,"  Proc. of 1990 IEEE Int'l Symposium Circuits and Systems, May 1990 pp. 872-876.

  232. M. Pedram, B. T. Preas, "Interconnection length estimation for optimized standard cell layouts,"  Proc. of Int'l Conference Computer Aided Design, Nov. 1989, pp. 390-393.

  233. M. Pedram, B. T. Preas, "Accurate prediction of physical design characteristics of random logic," Proc. of Int'l Conference Computer Design: VLSI in Computers and Processors, Oct. 1989, pp. 100-108. (Best Paper Award)

  234. B. T. Preas, M. Pedram and D. Curry, "Automatic layout of Silicon-on-Silicon hybrid packages,"  Proc. of 26th Design Automation Conference, Jun. 1989, pp. 394-399.

  235. B. Eschermann, W-W. Dai, E. S. Kuh and M. Pedram, "Hierarchical placement for macrocells: a `meet-in-the-middle' approach,"  Proc. of Int'l Conference Computer Aided Design, pp. 390-393.