Safar Hatami                     

            

Personal Information:

Updated May-2012
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Biography: 

Safar Hatami received his Electronics Engineering, B.Sc. Degree in 2000, from Sharif University of Technology and his Electronics, M.Sc. Degree in 2003, from University of Tehran.  As a researcher, Safar worked at the University of Tehran from 2003 to 2005 in the Low-Power High-Performance Nanosystems Lab where he was engaged in several projects, mostly in the area of VLSI and Signal Processing.  Safar went on to attend the University of Calgary in 2006, where he worked at the iRadio Lab on GHz transmitters for Software Defined Radio Systems (SDR).  In 2008, he received his M.Sc. Degree in Communication Engineering from the University of Calgary.

In the summer of 2008, Safar worked at IBM Hudson Valley Research Park in New York on Timing Analysis. He was then invited back by IBM T.J. Watson Research Lab (Yorktown) in summer 2010 to work on Statistical Timing Analysis and also Smart Grid.

Safar obtained his Electrical Engineering, Ph.D. at the University of Southern California, Viterbi School of Engineering in 2011.  Under his advisor, Professor Massoud Pedram, he completed research at the System Power Optimization and Regulation Technologies (SPORT) Lab in the Ming Hsieh Department of Electrical Engineering

Currently, he is working at Broadcom Corporation.

 

Research Interest: 

Timing Analysis and Sign-off Flow

Computer Aided Design (CAD)

Optimization Theory and Applications
RF and Mixed-Signal IC Design
Wireless Communications and Signal Processing

Smart Power Grids

 

 Education: 

- Ph.D. Candidate, Electrical Engineering, Minor in Finance and Business Economics, University of Southern California, 2007-2011

Research Subject: "Gate Delay Modeling and Static Timing Analysis in ASIC Designs Considering Process Variations"

            Advisor: Professor M. Pedram
 

- M.Sc., Computer Engineering, Emphasis on EDA and VLSI System Design, University of Southern California, 2010

 

- M.Sc., Electrical Engineering, Minor in Telecommunications Engineering, University of Calgary, Canada, 2006-2009

Thesis Title: "Software Defined Radio GHz Transmitter Using Delta Sigma Modulators"

Supervisor: Professor F.M. Ghannouchi

 

- M.Sc., Electrical Engineering, Minor in Electronics Engineering, University of Tehran, Iran, 2000-2003

Thesis Title: "A Real-Time Wavelet Vector Quantization Algorithm and Its VLSI Architecture for Image Compression"

Supervisor: Dr. H. Ahmadi-Noubari

 

- B.Sc., Electrical Engineering, Minor in Electronics Engineering, Sharif University of Technology, Iran, 1996-2000

Project Title: "Design and Implementation of a Signal Generator from 1 Hz to 10 MHz with Resolution of 1 Hz by Using a Digital Method"

            Supervisor: Dr. S.M.H. Alavi

Honors:

- Invention Achievement Award, International Business Machines Corp. (IBM) 2010
- Viterbi School Dean's Doctoral Fellowships Award,University of Southern California 2007-2011
- iCORE Post Graduate Scholarship Award, Alberta, Canada 2007-2008
- Best Paper Award, Iranian Student Conference on Electrical Engineering 2001

 Publications:

   Patent:

4)

S. Hatami, P. Feldmann, and S. Abbaspour, "Efficient and Accurate Waveform-Based Digital Gate Modeling for Timing Analysis," US patent disclosure, YOR820100765, August 2010.

3)

S. Hatami, P. Habitz, P. Feldmann and S. Abbaspour, "A method of device tracking optimization using current source models," US patent disclosure, BUR8-2010-0096, May 2010.

2)

S. Hatami, S. Abbaspour, P. Feldmann, "A method for waveform library compression and parametrization," US provisional patent application, SUS20100115013A1, 2008.

1)

S. Hatami, M. Helaoui, R. Negra, F. M. Ghannouchi, "All-Digital Multi-standard Transmitter Architecture Using Delta-Sigma Modulators," PCT provisional patent application, , WO2009055897A1, 2007.

   Journal:

8) S. Hatami and M. Pedram. "Compressing the output waveform data of a current source model library," To be submitted to IEEE Trans. on Computer Aided Design, 2012.
7) S. Hatami, H. Abrishami, and M. Pedram. "Statistical analysis of co-dependent setup and hold times of sequential circuit elements," To be submitted to IEEE Trans. on Computer Aided Design, 2012.
6) S. Hatami, M. Helaoui, F. M. Ghannouchi, M. Pedram, "A Pseudo-Parallel Processing Low-Oversampling Delta-Sigma Modulator Suitable for SDR Wireless Transmitters," submitted to IEEE Transaction on VLSI, 2012.

5)

F. M. Ghannouchi, S. Hatami, P. Aflaki, M. Helaoui, and F. M. Ghannouchi, "Multistandard GHz Wireless RF Transmitter Using a Delta-Sigma Modulator and Switch-Mode Power Amplifiers," IEEE Transactions on Microwave Theory and Techniques , Vol. 58, No. 11, 2811-2819, Nov. 2010.

4)

M. Helaoui, S. Hatami, R. Negra, F. M. Ghannouchi, "A Novel Architecture of Delta-Sigma Modulator Enabling All-Digital Multiband Multistandard RF Transmitters Design," IEEE Transactions on Circuits and Systems II, Vol. 55, No. 11, 1129-1133, Nov. 2008.

3)

A. Abbasian, S. Hatami, and A. Afzali-Kusha, and M. Pedram, "Wavelet-Based Dynamic Power Management for Non-stationary Service Requests," ACM Transactions on Design Automation of Electronic Systems, 2007.

2)

S. Hatami, Y. Azizi, H.R. Bahrami, D. Motevalizadeh, A. Afzali-kusha, "SOI Modeling for VLSI Circuit Design with Technology Independent Neural Networks," IEEE Transaction on CAD, Vol. 23, No.11, pp. 1580-1587, Nov. 2004.

1)

S. Hatami, B.N. Aarabi, C. Lucas, "A New Fuzzy Morphology Approach Based on the Generalized Dempster-Shafer Theory with Fuzzy-Valued Measure," Iranian Journal of Fuzzy System, Vol. 1, No.2, pp. 1-14, Oct. 2004.

Conference:

37)

S. Hatami, P. Feldmann, S. Abbaspour, M. Pedram,"Algorithms for Waveform Propagation and Logic Cell Delay Calculation under a Current Source Modeling Approach,"To be submitted, 2012.

36) T.Cui, H. Goudarzi, S. Hatami, S. Nazarian, and M. Pedram, "Concurrent optimization of consumer's electrical energy bill and producer's power generation cost under a dynamic pricing model," Proc. of the 3rd IEEE PES Innovative Smart Grid Technologies Conference, Jan. 2012.
35) H. Goudarzi, S. Hatami, and M. Pedram, "Demand-side load scheduling incentivized by dynamic energy prices," Proc. of the 2nd Int'l Conf. on Smart Grid Communications, Oct. 2011.
34) S. Hatami, P. Feldman, S. Abbaspour, "Efficient and Accurate Waveform-Based Digital Gate Modeling for Timing Analysis," ACM International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems (TAU Workshop), Santa Barbara, Mar 2011.
33) F. Kashfi, S. Hatami and M. Pedram, "Multi-objective optimization techniques for the VLSI circuits," IEEE Symposium on Quality of Electronic Design, Santa Clara, Mar. 2011.
32) S. Hatami and M. Pedram, "Minimizing the electricity bill of cooperative users under a quasi-dynamic pricing model," IEEE International Conference on Smart Grid Communications, Maryland, Oct. 2010.
31) S. Hatami and M. Pedram, "Efficient representation, stratification, and compression of variational CSM library waveforms using robust principle component analysis," Design Automation and Test in Europe, Mar. 2010.
30) H. Abrishami, S. Hatami, and M. Pedram "Multi-corner, energy-delay optimized, NBTI-aware flip-flop design," International Symposium on Quality of Electronic Design, California, 2010.
29) H. Abrishami, S. Hatami, and M. Pedram, "Analysis and optimization of sequential circuit elements to combat single-event timing upsets," IEEE International Symposium on Circuits and Systems, France, 2010.

28)

S. Hatami, P. Feldmann, S. Abbaspour, M. Pedram, "Efficient Compression and Handling of Current Source Model Library Waveforms," Design Automation and Test in Europe, France, 2009.

27)

H. Abrishami, S. Hatami,  M. Pedram, " Characterization and Design of Sequential Elements to Combat Soft Errors," IEEE International Conference on Computer Design, California, 2008.

26)

S. Hatami, H. Abrishami, M. Pedram, "Statistical Timing Analysis of flip-flops Considering Codependent Setup and Hold Times," Great Lakes Symposium on VLSI, Florida, 2008.

25)

H. Abrishami, S. Hatami, B. Amelifard, M. Pedram, "NBTI-Aware Flip-Flop Characterization and Design," Great Lakes Symposium on VLSI, Florida, 2008.

24)

B. Amelifard, S. Hatami, H. Fatemi, M. Pedram, "A Current Source Model for CMOS Logic Cells Considering Multiple Input Switching and Stack Effect," Design Automation and Test in Europe, Germany, 2008.

23)

S. Hatami, M. Helaoui, R. Negra, F. M. Ghannouchi, "Multiband Multistandard Delta-Sigma-Based RF Transmitters," Software Defined Radio Technical Conference and Product Exposition, Colorado, 2007.

22)

A. Shirazi, S. Hatami, H. Ahmadi, B. Forouzandeh, "Wavelet-based Watermarking of Images using Ratio of Detection Factor," International Symposium on Image/Video Communications Over Fixed and Mobile Networks, Tunisia, 2006.

21)

S. Hatami, S. Sharifi, H. Ahmadi, M. Kamarei, "Real-Time Image Compression Based on Wavelet Vector Quantization, Algorithm and VLSI Architecture," IEEE International Symposium on Circuits and Systems, Japan, 2005.

20)

S. Hatami, S. Sharifi, M. Kamarei and H. Ahmadi, "Hardware Implementation of 2D Discrete Wavelet Transform by Using Non-separable Lifting Scheme," International Workshop on System, Signal and Image, Greece, 2005.

19)

S. Hatami, S. Sharifi, M. Kamarei, H. Ahmadi, "Non-Separable 2-D and 3-D Discrete Wavelet Transform for Image and Video Processing Using Lifting Scheme," International Workshop on System, Signal and Image, Greece, 2005.

18)

S. Hatami, R. Hosseini, M. Kamarei, H. Ahmadi, "Wavelet Based Fingerprint Image Enhancement," IEEE International Symposium on Circuits and Systems, Japan, 2005.

17)

M. A. Safaii, S. Hatami, E. Atoofian, Z. Navabi, A. Afzali-Kusha, "Data-Compression Based Low Power BIST Scan-cell," IEEE International Conference on Microelectronic, Tunisia, 2005.

16)

S. Hatami, H. Ahmadi, B. Foruzandeh, "Lifting-Based Non-Separable 2-D and 3-D Discrete Wavelet Transform for Image and Video Processing," accepted in International Symposium on Circuits and Systems, Canada, 2004.

15)

A. Abbasian, S. Hatami, A. Afzali-Kusha, "Event-Driven Dynamic Power Management Based on Wavelet Forecasting Theory," IEEE International Symposium on Circuits and Systems, Canada, 2004.

14)

S. Hatami, M. A. Safaii, E. Atoofian, Z. Navabi, A. Afzali-Kusha, "Low Power Scan-path," IEEE International Symposium on Circuits and Systems, Japan, 2005.

13)

S. Hatami, M. J. Yazdanpanah, B. Foruzandeh, O. Fatemi, "A Modified Method for Codebook Design with Neural Network in VQ-based Image Compression," IEEE International Symposium on Circuits and Systems, Thailand, 2003.

12)

S. Hatami, Y. Azizi, H. R. Bahrami, D. Motevalizadeh, A. Afzali-Kusha, "Modeling of SOI MOSFETs Using Neural Networks," IEEE International Conference on Microelectronic, Lebanon, 2002.

11)

E. Atoofian, S. Hatami, Z. Navabi, A. Afzali-Kusha, "A Novel Low Power Scan-Path Architecture," Computer Science and Information Technology Conference, Armenia, 2003.

10)

M. A. Safaii, E. Atoofian, S. Hatami, Z. Navabi, A. Afzali-Kusha, "A New Low Power BIST Architecture," IEEE Workshop on RTL and High Level Testing, China, 2003.

9)

S. Hatami, S. Sharifi, M. Kamarei, H. Ahmadi, "VLSI Architecture of Lifting-Based Nonseparable 2D Discrete Wavelet Transform," Iranian   Conference on Electrical Engineering, 2005.

8)

S. Hatami, S. Sharifi, M. Kamarei, H. Ahmadi, "Algorithm and VLSI Architecture of Wavelet Vector Quantization," Iranian Conference on Electrical Engineering, 2005.

7)

A. Abbasian, S. Hatami, A. Afzali-Kusha, C. Lucas, M.R. Zamani "Wavelet Based Dynamic Power Management for Nonstationary Service Requests," Iranian Conference on Electrical Engineering , 2004.

6)

S. Hatami, M.J. Yazdanpanah, B. Foruzandeh, O. Fatemi, "Shifted Frequency Sensitive Hierarchical SOM (SFS-HSOM), A Modified VQ with Neural Network," Iranian Conference on Machine Vision, Image Processing and Applications, 2003.

5)

S. Hatami, H. Ahmadi, B. Foruzandeh, O. Fatemi, "Comparison of Different Two Dimensional Discrete Wavelet Transform (2-D DWT) Hardware for Image and Video compression," Iranian Conference on Machine Vision, Image Processing and Applications, 2003.

4)

S. Hatami, B.N. Aarabi, C. Lucas, "A New Fuzzy Morphology Approach Based on the Generalized Dempster-Shafer Theory with Fuzzy-Valued Measure," Iranian Conference on Intelligent Systems, 2003.

3)

S. Hatami, C. Lucas, B.N. Aarabi, "Improvement and Comparison of Several Soft Computing Approaches for Vector Quantization Codebook Generation," Iranian Conference on Intelligent Systems, 2003.

2)

E. Atoofian, S. Hatami, "Methods For Increasing Fault Coverage," Iranian Student Conference on Electrical Engineering, 2002.

1)

S. Hatami, "Design and Implementation of a Signal Generator: from .01 Hz to 10 MHz with Resolution .01 Hz," Iranian Student Conference on Electrical Engineering, 2001. (Best Paper Award)

Academic Experiences:

Teaching Assistant:

MOS VLSI Circuit Design

2010 University of Southern California

VLSI System Design

2008-2010

University of Southern California

Signal Processing

2007

University of Calgary

Electromagnetic

2006-2007

University of Calgary

SOI Circuits and Devices

2004-2005

University of Tehran

Electronic Lab

2001-2005

University of Tehran

Circuit & Measurement Lab

2004-2005

University of Tehran

Digital Circuit Lab

2004-2005

University of Tehran

Wavelets and Signal Processing

2004

University of Tehran

Neural Networks

2004

University of Tehran

Professional Services:

Invited talk at IBM CMOS Forum, New York 2010
Invited session chair, International Workshop on Systems, Signals and Image Processing, Greece 2005
Reviewer, Journal of Microelectronics Reliability Elsevier 2010
Reviewer, IEEE International Conference on Smart Grid Communications (SmartGridComm) 2010
Reviewer, International Conference on Computer Design (ICCD) 2010
Reviewer, International Conference on Computer Design (ICCD) 2009

Reviewer, IEEE Transactions on Very Large Scale Integration Systems (TVLSI)

2009

Reviewer, IEEE Transactions on Very Large Scale Integration Systems (TVLSI)

2008

Reviewer, ACM Great Lakes Symposium on VLSI      

2007

Reviewer, IEEE Midwest Symposium on Circuits and Systems (MWSCAS & NEWCAS)

2007

Reviewer, IEEE International Conference on Electronics, Circuits and Systems (ICECS)

2007

Reviewer, IEEE Transactions on Image Processing

2006

Computer Skills: 

Software Package: Cadence virtuoso, NC Verilog and NCSIM, ModelSim, MATLAB, Mathematica, Visual DSP++, ADS, LabVIEW, ICCAP, S-plus, VHDL, Altera MAX II Plus, Leonardo, PSPICE, HSPICE, Nanosim, PrimeTime, Design Compiler, Simulink, Protel, Orcad, LEDIT, Latex, Net Logo

 

Programming Language: Perl, Visual C++, C/C++, Visual Basic, Pascal, and Assembly

 

 

Graduate Courses:

1)

VLSI Circuits

16)

Active Integrated Circuit Design

2)

Mathematical Foundations for CAD of VLSI Circuits

17)

Microwave Circuits and Antennas

3)

CAD of Digital Systems I

18)

Microwave Active Circuits Design

4)

VLSI System Design I

19)

Software Defined Radio (SDR) Systems

5)

VLSI System Design II

20)

Multi-Input Multi-Output (MIMO) Radio Systems

6)

Computer Systems Architecture

21)

Digital Communications

7)

Computer Aided Design II

22)

Video Processors

8)

VHDL

23)

Image Signal Processing

9)

Testability                    

24)

Digital Signal Processing

10)

Low-power  Integrated Circuits

25)

Computational Biology

11)

Fabrication of Electronic Components

26)

Fuzzy Logic

12)

Analysis of Algorithms

27)

Neural Networks

13) Data Converters and Analog Filters 28) Investment Analysis and Portfolio Management
14) Integrated Circuit Applications 29) Technology Commercialization
15)

Semiconductor Devices (CMOS and SOI)

 

 

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